Date posted 06/30/2026
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You have spent years verifying digital hardware that ships in production silicon, where missed corner cases have real consequences. You understand that verification requires building strategies that prove designs work before tape-out, not just running tests. You work effectively with UVM testbenches, formal verification, and assertion-based methodologies to validate complex IP components.
You are comfortable taking IP component and subsystem specifications and developing suitable verification approaches. You can distinguish between testbench issues and design defects, and you communicate findings clearly to design teams. Security matters to you as a technical discipline, and you understand that embedded security IP requires different verification approaches. At Synopsys, you will work on security IP protecting devices across automotive, mobile, networking, and IoT applications with an experienced Eindhoven team.
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Design and execute verification strategies for complex security IP subsystems with digital components including cryptographic cores, random number generators, interface modules and memories
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Build and maintain UVM testbenches, assertion-based verification environments, and formal verification flows for IP subsystems
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Develop test plans, test specifications, and coverage models that map to product requirements
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Automate regression environments using scripting to ensure continuous verification across design iterations
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Run verification tests in both simulator environments and on FPGA platforms
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Debug failures at the RTL and testbench level, working directly with design engineers and architects to root-cause and resolve defects
- formal verification techniques to prove properties and corner cases that simulation cannot easily reach
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Support embedded software and driver verification to ensure hardware-software integration works correctly in real system contexts
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Your verification strategies will catch critical bugs before product release or tape-out, protecting Synopsys customers from costly silicon respins and security vulnerabilities in production devices
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The test plans and coverage models you build will define the quality bar for security IP used in automotive, mobile, and IoT systems worldwide
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Your automation work will accelerate regression cycles and free up engineering time for deeper verification challenges
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The formal verification flows you develop will prove correctness in areas where simulation alone is insufficient, raising confidence across the product line
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Your collaboration with design and architecture teams will shape IP that meets both functional and security requirements from the start
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The debugging and root-cause analysis you perform will directly improve design quality and reduce time to market
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Your expertise will help the Eindhoven team stay ahead of evolving security threats and verification methodologies
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Bachelor's or Master's degree in Electrical Engineering or Computer Science with 6+ years of hands-on verification experience
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Proven track record verifying digital hardware IP components through multiple tape-outs or product releases
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Deep expertise in SystemVerilog, UVM, assertion-based verification, coverage-driven methodology, and formal verification techniques
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Strong understanding of IC design flows, RTL design principles, and the handoff between verification and implementation
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Experience automating verification flows and building regression environments using scripting languages like Python, Perl, or TCL
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Solid knowledge of embedded hardware and software environments, including how IP integrates into SoC architectures
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Knowledge of security protocols, cryptographic algorithms, or embedded security is a strong plus
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Experience with IP synthesis flows from RTL to netlist, verifying correctness of timing and synthesis constraints is a plus
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You can analyze a security subsystem specification, identify verification challenges and propose a verification strategy for the subsystem including its IP components
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You develop testbenches and verification environments that are maintainable and can be extended by other engineers
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You provide constructive feedback when test plans or coverage models need strengthening, focusing on technical gaps and solutions
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You work effectively across time zones with global teams, maintaining clear communication and alignment on verification goals
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You stay current on verification methodologies and security developments to ensure your approach remains effective
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You communicate verification findings clearly to design engineers and architects, focusing on root cause and resolution path
You will join the Security IP group in Eindhoven, a dedicated team advancing embedded security technologies that enable customers to build chips with cutting-edge cryptographic solutions. The team is made up of world-class hardware and software engineers focused on delivering security IP found in advanced devices across automotive, networking, mobile, and IoT applications. This is a global group that takes security seriously and builds products to the Synopsys standard for best-in-class quality.
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
